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seminars:seminar_03_31_09 [2017/09/20 22:02] (current)
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 +======Shore-MT:​ A Scalable Storage Manager for the Multicore Era======
 +Tuesday March 31, 2009\\
 +Hamerschlag Hall D-210\\
 +4:00 pm\\
 +[[http://​www.cs.cmu.edu/​~ipandis/​|Ippokratis Pandis]]\\
 +Carnegie Mellon University\\
 +Database storage managers have long been able to efficiently handle multiple concurrent requests. Until recently, however, a computer contained only a few single-core CPUs, and therefore only a few transactions could simultaneously access the storage manager'​s internal structures. This allowed storage managers to use non-scalable approaches without any penalty. With the arrival of multicore chips, however, this situation is rapidly changing. ​ More and more threads can run in parallel, stressing the internal scalability of the storage manager. Systems optimized for high performance at a limited number of cores are not assured similarly high performance at a higher core count, because unanticipated scalability obstacles arise.
 +We benchmark four popular open-source storage managers (Shore, BerkeleyDB, MySQL, and PostgreSQL) on a modern multicore machine, and find that they all suffer in terms of scalability. ​ We briefly examine the bottlenecks in the various storage engines. We then present Shore-MT, a multithreaded and highly scalable version of Shore which we developed by identifying and successively removing internal bottlenecks. When compared to other DBMS, Shore-MT exhibits superior scalability and 2-4 times higher absolute throughput than its peers. We also show that designers should favor scalability to single-thread performance,​ and highlight important principles for writing scalable storage engines, illustrated with real examples from the development of Shore-MT. ​
 +Ippokratis Pandis is a Ph.D. student of the Electrical and Computer Engineering department of Carnegie Mellon University, advised by Prof. Ailamaki. He is a member of the Staged database systems project and his research focuses on high-performing database computing on emerging computer architectures.
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