An FPGA-based Reliability and Security Engine for Protecting Critical Power Infrastructure

Tuesday February 17, 2009
Hamerschlag Hall D-210
4:00 pm

Peter Klemperer
Carnegie Mellon University


The widespread availability of low-cost, general-purpose computing has led to increased automation and communication within critical infrastructure such as the electrical power grid. Introducing computing hardware into the systems that perform the work of maintaining critical infrastructure presents many new questions about assuring security against malicious attackers and saboteurs. Current computing platforms support secure computing mainly through software techniques that are typically slow performing. The Reliability and Security Engine (RSE) and Trusted Computing Base framework introduce low-overhead, hardware-based security checking support that can be retrofitted to existing architectures using field-programmable gate array technology (FPGA).

In this talk I will present a case study on the application of the Trusted Computing Base and RSE to protecting the electric power grid infrastructure. An auto-reclosing synchrophasor relay was instrumented and protected with the Trusted Computing Base FPGA-hardware while utilizing typical electrical utility substation hardware, showcasing the flexibility of the technique for application in realistic scenarios.


Peter F. Klemperer is a first year PhD student at Carnegie Mellon (ECE), advised by James C. Hoe. He completed his Masters Degree in Electrical and Computer Engineering at the University of Illinois at Urbana-Champaign in 2008. His research interests include reliable and secure computing in both critical and consumer applications.

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