Tuesday February 16, 2016
Location: CIC Panther Hollow Room
Hardware specialization is an increasingly common technique to enable improved performance and energy efficiency in spite of the diminished benefits of technology scaling. Exploring hardware specialization requires a vertically integrated research approach spanning applications, compilers, run-times, instruction set design, microarchitectures, and VLSI implementation.
In the first part of the talk, I will describe our work on a new architectural design pattern called explicit loop specialization (XLOOPS) based on the idea of elegantly encoding inter-iteration loop dependence patterns in the instruction set. The XLOOPS hardware/software abstraction requires only lightweight changes to a general-purpose compiler to generate XLOOPS binaries and enables executing these binaries on: (1) traditional microarchitectures with minimal performance impact, (2) specialized microarchitectures to improve performance and/or energy efficiency, and (3) adaptive microarchitectures that can seamlessly migrate loops between traditional and specialized execution to dynamically trade-off performance vs. energy efficiency. Our initial results show promising performance improvements compared to simple in-order processors and energy efficiency improvements compared to complex out-of-order processors.
In the second part of the talk, I will describe PyMTL and Pydgin, two new Python-based frameworks designed to improve the productivity of vertically integrated computer architecture research. PyMTL leverages the Python programming language to create a highly productive domain-specific embedded language for concurrent-structural modeling and hardware design. The PyMTL framework encourages a philosophy of “modeling towards layout” in which a microarchitecture is incrementally refined from a high-level functional-level model, to a timing-approximate cycle-level model, to a bit-accurate RTL implementation. Pydgin is a framework for rapidly developing very fast instruction-set simulators (ISSs) from a Python-based architecture description language. Both frameworks were critical in exploring the XLOOPS architectural design pattern, and we are continuing to leverage these frameworks in our research and teaching.
Christopher Batten is an Assistant Professor in the School of Electrical and Computer Engineering at Cornell University, where he leads a research group focusing on energy-efficient parallel computer architecture for both high-performance and embedded applications. His work has been recognized with several awards including an AFOSR Young Investigator Program award (2015), Intel Early Career Faculty Honor Program award (2013), an NSF CAREER award (2012), a DARPA Young Faculty Award (2012), and an IEEE Micro Top Picks selection (2004). His teaching has been recognized with a Michael Tien '72 Excellence in Teaching Award (2013) and a James M. and Marsha D. McCormick Award for Outstanding Advising of First-Year Engineering Students (2013). Prior to his appointment at Cornell, Batten received his Ph.D. in electrical engineering and computer science from the Massachusetts Institute of Technology in 2010. He received an M.Phil. in engineering as a Churchill Scholar at the University of Cambridge in 2000, and received a B.S. in electrical engineering as a Jefferson Scholar at the University of Virginia in 1999.